VHDL: FIR Filter Design

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10 los freelancers están ofertando un promedio de $69 para este trabajo.

ahmedmohamed85

Dear sir I have more than 9 years experience in digital design using vhdl , please check my profile also please message me so that we can discuss

$67 USD en 1 día
(251 comentarios)
7.5
ducdctoandh

I would like to bid this job because I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsub Más

$100 USD en 2 días
(39 comentarios)
5.2
bchandra1955

Professional engineer with DSP experience ................................................................................................

$50 USD en 5 días
(38 comentarios)
5.5
SqUa11

Hello, My name is Mohamed. I have 5 years experience in VHDL and FIR filter design. I checked your project description and the word file. I can handle it and deliver it. Contact me for more details. Regards

$60 USD en 3 días
(47 comentarios)
4.7
rohi1710rohi1710

Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TS Más

$66 USD en 3 días
(4 comentarios)
3.8
$50 USD en 2 días
(4 comentarios)
3.4
$194 USD en 1 día
(4 comentarios)
3.5
saminatinny

A proposal has not yet been provided

$166 USD en 5 días
(4 comentarios)
3.8
humanitista

I can build this FIR filter but I am most used with Xilinx ISE instead of Quartus, but I can build this on Quartus too. I can create the testbench files, plot the results in Matlab, etc. I just need to understand what Más

$55 USD en 5 días
(2 comentarios)
2.1
praveenmaddirala

A proposal has not yet been provided

$25 USD en 1 día
(0 comentarios)
0.0
dangluonghoangvu

hi you. i think i can fit this project. i have two years exp in fpga design. so, it's ok with me. please contact me if you need more information for proposion

$55 USD en 7 días
(0 comentarios)
0.0