Basic Electronics LTSpice

1. Do an LTspice transient analysis of the circuit shown in Fig. 8.7. Measure the propagation delay between V(in) and V(out), and the propagation delay between V(in) and V(inv1_out). 2. What is your observation regarding the propagation delay of the output voltage waveform of the third inverter V(out) compared to that of the first inverter V(inv1_out)? 3. Do an LTspice transient analysis of the circuit shown in Fig. 8.8. 4. After simulating the circuit, examine at the V(X), V(Y), and V(out) waveforms. Find the truth table.22  What logic gate does this circuit implement? 5. Try to justify the truth table you have obtained based on your understanding of how complementary switches (PMOS and NMOS transistors) work. Hint: A high input voltage activates an NMOS transistor (effectively making its channel resistance very low, hence serving as a closed switch). In contrast, a low input voltage activates a PMOS transistor (effectively making its channel resistance very low, hence serving as a closed switch). The output node either gets pulled up to high voltage level or pulled down to ground (low voltage level) depending on the existence of a closed switch (conducting path) between it and either VDD or ground. You need to include the circuit’s schematic and the simulation results of your design in your assignment submission. To do that in LTspice, click on Tools >> Copy bitmap to Clipboard. Then paste the copied image in Word document.