Development of the WebP image compression algorithm in an FPGA as embedded system

ALL FILES ARE ATTACHED Essay Language : English Dissertation Chapter Size : 80 pages Deadline : 07/11/2013 Faculty: : Electronics and Computer Engineering Essay Tittle : Development of the WebP image compression algorithm in an FPGA as embedded system Subject Title : Embedded systems Details : The development must be done using the VHDL programming language and fully functional in Xilinx FPGA platforms, such as Spartan, Virtex, Zinq, using the Xilinx IDE and EDK suit. It should be fully developed for parallel process of data. Speed measurement and comparison to the JPEG standard for size and compression speed. Required Block diagram, Development process and Code (not counted in pages).